Semiconductor compensation devices such as n- or p-channel Metal Oxide Semiconductor Field Effect Transistors (n-channel or p-channel MOSFETs), diodes, pn junction detectors, Silicon Controlled Rectifiers (SCRs) are frequently used semiconductor products. These devices can be based on mutual compensation of the charge of n- and p-doped regions in a semiconductor body of the device. The n- and p-doped regions are spatially arranged such that, in a reverse operation mode, a space charge of the n-doped region compensates the space charge of the p-doped region. By using this compensation of the p- and n-doping, a doping concentration of dopants of the one of these regions constituting a drift zone can be increased, whereby, despite a possible loss in the current-carrying area, a gain in an area-specific on-resistance RonxA can be achieved. Production tolerances such as lithographic mismatch or deviations of target dopant concentrations may lead to deviations of desired charge compensation of these n- and p-doped regions. This may have a negative impact on device performance such as decreased device breakdown voltage and may limit the maximum doping concentration of the n- and p-doped regions. For these and other reasons, there is a need for an improved method of manufacturing a semiconductor device.